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Revision 1.12
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AS5130
Datasheet - Application Information
8.3 Application Example III: Polling Mode
Figure 24. Polling Mode
Once powered up for at least 2.5ms, the AS5130 can be operated in a pulsed mode, where it is periodically turned on/off by a high side FET
(PMOS) switching transistor with a low Ron (<10?. The on-time is at least 250祍 in order to perform one measurement. A valid measurement
result can be verified by checking the lock bit (ADC is locked) in the serial data stream.
After startup an OTP reset has to be performed in order to read out valid trimming information. Then a special SSI command (STORE REF)
copies the actual angle into a buffered reference angle register. Now the AS5130 can be turned off. Special registers will be buffered by the low
power supply and will keep the actual settings. After a t
on
 of min. 250 us, the actual angle is compared with the stored reference angle. If the
angle difference is larger than a threshold value (wlsb, SSI command WRITE CUST), the AS5130 will send an interrupt request to an external
device via the WAKE pin.
Due to the internal POR level of the IC, t
on
 starts after VDD has reached 4.3V (worst case POR level).The average power consumption in this
pulsed mode depends on the supply current in active mode and the duty cycle of the on/off pulse:
I
avg
 =
(EQ 10)
Example: Sampling period = one measurement every 100ms. System constants = I
active
 = 19mA, t
on
(min) = 250祍:
I
avg
 =
 = 47.5礎
(EQ 11)
VDD
VSS
micro
controller
AS5130
100n
VSS
+5V
VDD
CS
VDD
CLK
DIO
VSS
AS5130
S
N
on/off
10k
t
on
t
off
Cx
>1礔
+5V
active

t
on
t
on
t
off
+
--------------- -------- -
19mA

250?SPAN class="pst AS5130-ASST-500_2599059_5">s
50?SPAN class="pst AS5130-ASST-500_2599059_5">s   99.75ms
+
--------------- ----------------- -------- -
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